Integrated phase lock loops for high frequency wireless communications systems

Engineers face stiff challenges in designing phase-locked loop (PLL) circuitsfor wireless communications thanks to phase noise and other obstacles. This practical book comes to the rescue with a proven PLL design and optimization methodology that lets designers assess their options, predict PLL behavior, and develop cost-effective PLLs that meet performance requirements no matter what IC (integrated circuit) challenges they come up against. This uniquely comprehensive toolkit takes designers step-by-step through operation principles, design procedures, phase noise analysis, layout considerations, and CMOS realizations for each PLL building block. It provides a sample design of a fully integrated PLL for WLAN applications, demonstrating every step from specs definitionand circuit characterization to layout generation and circuit schematics. INDICE: Approach to CMOS PLL Design. PLL Fundamentals. LC Tank Voltage Controlled Oscillator. Frequency Divider. Phase Detector. Design of a Fully Integrated PLL for WLAN Applications. Characterization.

• ISBN: 978-1-59693-383-5
• Editorial: Artech House
• Encuadernacion: Cartoné
• Páginas: 230
• Fecha Publicación: 01/01/2009
• Nº Volúmenes: 1
• Idioma: Inglés