Substrate Noise Coupling in RFICs addresses substrate noise coupling in RF and mixed signal ICs when used in a system on chip(SoC) containing digital ICs as well. This trend of integrating RF, mixed signal ICs with large digital ICs is found in many of today's commercial ICs such as single chip Wi-Fi or Bluetooth solutions and is expected to grow rapidly in the future. The book reports modeling and simulation techniques for substrate noise coupling effects in RFICs and introduces isolation structures and design guides to mitigate such effects with the ultimate goal of enhancing the yield of RF and mixed signal SoCs . This is particularly critical when process feature sizes scale down to the nano meter range. Substrate Noise Coupling in RFICs reports silicon measurements, new test and noise isolation structures as well as calibration of a design flow used in the design and debug phases of RFIC circuits. Addresses substratenoise coupling in RF and mixed signal ICs when used in a system on chip(SoC) containing digital ICs as well Great reference for courses in RFIC and mixed signal ICs, and for design project courses Reports silicon measurements, new test and noise isolation structures as well as calibration of a design flow usedin the design and debug phases of RFIC circuits INDICE: Dedication. List of Tables. List of Figures. Preface. List of Acronyms. 1 Introduction. 2 Analysis of Substrate Noise Coupling. 3 Experimental Data to calibrate the design flow. 4 Design Guide for Substrate Noise Isolationfor RF Applications. 5 On Chip Inductor Design Flow. 6 Case studies for the impact and remedy of substrate noise coupling. 7 Conclusion. Appendix A Scattering Parameters. Appendix B Measurements Setup. Bibliography.
- ISBN: 978-1-4020-8165-1
- Editorial: Springer
- Encuadernacion: Cartoné
- Páginas: 200
- Fecha Publicación: 01/03/2008
- Nº Volúmenes: 1
- Idioma: Inglés