Silicon-On-Insulator (SOI) Technology: Manufacture and Applications

Silicon-On-Insulator (SOI) Technology: Manufacture and Applications covers SOI transistors and circuits, manufacture, and reliability. The book also looks at applications such as memory, power devices, and photonics. The book is divided into two parts; part one covers SOI materials and manufacture, while part two covers SOI devices and applications. The book begins with chapters that introduce techniques for manufacturing SOI wafer technology, the electrical properties of advanced SOI materials, and modeling short-channel SOI semiconductor transistors. Both partially depleted and fully depleted SOI technologies are considered. Chapters 6 and 7 concern junctionless and fin-on-oxide field effect transistors. The challenges of variability and electrostatic discharge in CMOS devices are also addressed. Part two covers recent and established technologies. These include SOI transistors for radio frequency applications, SOI CMOS circuits for ultralow-power applications, and improving device performance by using 3D integration of SOI integrated circuits. Finally, chapters 13 and 14 consider SOI technology for photonic integrated circuits and for micro-electromechanical systems and nano-electromechanical sensors. The extensive coverage provided by Silicon-On-Insulator (SOI) Technology makes the book a central resource for those working in the semiconductor industry, for circuit design engineers, and for academics. It is also important for electrical engineers in the automotive and consumer electronics sectors. Covers SOI transistors and circuits, as well as manufacturing processes and reliabilityLooks at applications such as memory, power devices, and photonics INDICE: Contributor contact detailsWoodhead Publishing Series in Electronic and Optical MaterialsIntroductionPart I: Silicon-on-insulator (SOI) materials and manufacture 1. Materials and manufacturing techniques for silicon-on-insulator (SOI) wafer technology Abstract:1.1 Introduction1.2 SOI wafer fabrication technologies: an overview1.3 SOI volume-fabrication process1.4 SOI wafer structures and characterization1.5 Direct wafer bonding: wet surface cleaning techniques1.6 Characterization of direct bonding mechanisms1.7 Alternative surface preparation processes for Si and SiO2 direct bonding1.8 Mass production of SOI substrates by ion implantation, bonding and splitting: Smart CutT technology1.9 Fabrication of more complex SOI structures1.10 Fabrication of heterogeneous structures1.11 Conclusion1.12 Acknowledgments1.13 References2. Characterization of the electrical properties of advanced silicon-on-insulator (SOI) materials and transistors Abstract:2.1 Introduction2.2 Conventional characterization techniques2.3 Characterization of SOI wafers using the pseudo-metal oxide semiconductor field effect transister (MOSFET) technique2.4 Developments in the pseudo-MOSFET technique2.5 Conventional methods for the characterization of FD MOSFETs2.6 Advanced methods for the characterization of FD MOSFETs2.7 Characterization of ultrathin SOI MOSFETs2.8 Characterization of multiple-gate MOSFETs2.9 Characterization of nanowire FETs2.10 Conclusions2.11 Acknowledgments2.12 References3. Modeling the performance of short-channel fully depleted silicon-on-insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs) Abstract:3.1 Introduction3.2 The development of SOI MOSFET modeling3.3 A 1-D compact capacitive model for a SOI MOSFET3.4 A 2-D analytical model for a SOI MOSFET3.5 Modeling of dual gate and other types of SOI MOSFET architecture3.6 References4. Partially depleted (PD) silicon-on-insulator (SOI) technology: circuit solutions Abstract:4.1 Introduction4.2 PDSOI technology and devices4.3 Circuit solutions: digital circuits4.4 Circuit solutions: static random access memory (SRAM) circuits4.5 SRAM margining: PDSOI example4.6 Future trends4.7 References5. Planar fully depleted (FD) silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) technology Abstract:5.1 Introduction5.2 Planar FDSOI technology5.3 VT adjustment on FDSOI: channel doping, gate stack engineering and ground planes5.4 Substrate requirements for FDSOI CMOS devices: BOX and channel thicknesses5.5 Strain options on FDSOI5.6 Performance without and with back bias5.7 Conclusion5.8 Acknowledgements5.9 References6. Silicon-on-insulator (SOI) junctionless transistors Abstract:6.1 Introduction6.2 Device physics6.3 Models for the junctionless transistor6.4 Performance comparison with trigate field effect transistors (FETs)6.5 Beyond the classical SOI nanowire architecture6.6 Conclusion6.7 Acknowledgments6.8 References7. Silicon-on-insulator (SOI) fin-on-oxide field effect transistors (FinFETs) Abstract:7.1 Introduction7.2 SOI FinFET device performance7.3 SOI FinFET substrate optimization7.4 Process and statistical variability of FinFETs7.5 Summary7.6 References8. Understanding variability in complementary metal oxide semiconductor (CMOS) devices manufactured using silicon-on-insulator (SOI) technology Abstract:8.1 Introduction8.2 Statistical variability in planar fully depleted SOI devices8.3 Statistical aspects of reliability8.4 Fin-on-oxide field effect transistors (FinFETs) on SOI8.5 Summary and future trends8.6 References9. Protecting against electrostatic discharge (ESD) in complementary metal oxide semiconductor (CMOS) integrated circuits (ICs) manufactured using silicon-on-insulator (SOI) technology Abstract:9.1 Introduction9.2 ESD characterization in SOI devices: SOI transistors9.3 ESD characterization in SOI devices: SOI diodes9.4 ESD characterization in SOI devices: fin-on-oxide field effect transistors (FinFETs) and FinDiodes9.5 ESD characterization in SOI devices: fully depleted SOI (FDSOI) devices9.6 ESD network optimization in SOI devices9.7 Conclusion9.8 References Part II: Silicon-on-insulator (SOI) devices and applications 10. Silicon-on-insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs) for radio frequency (RF) and analogue applications Abstract:10.1 Introduction10.2 Current performance of RF devices10.3 Limiting factors in MOSFET performance10.4 Schottky barrier (SB) MOSFETs10.5 Ultra-thin body ultra-thin BOX (UTBB) MOSFETs10.6 RF performance of a multi-gate MOSFET: fin-on-oxide field effect transistor (FinFET)10.7 High-resistivity silicon (HR-Si) substrate for SOI technology10.8 Conclusions10.9 Acknowledgements10.10 References11. Silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) circuits for ultralow power (ULP) applications Abstract:11.1 Introduction: the importance of ultralow power devices11.2 Minimizing power consumption of CMOS circuits11.3 Issues on Vdd scaling to improve the energy efficiency of CMOS circuits11.4 Developing SOI devices with small variability and adaptive bias control11.5 Modelling variability11.6 Device design for ultralow-voltage operation11.7 Assessing variability in fully depleted silicon-on-insulator (FDSOI) devices11.8 Assessing the reliability of FDSOI devices11.9 Circuit design of FDSOI devices11.10 Future trends11.11 Acknowledgment11.12 References12. 3D integration of silicon-on-insulator (SOI) integrated circuits (ICs) for improved performance Abstract:12.1 Introduction12.2 3D integration using Cu-Cu bonding: generic flow techniques12.3 3D integration using Cu-Cu bonding: face-to face silicon layer stacking12.4 3D integration using Cu-Cu bonding: back-to-face silicon layer stacking12.5 3D integration using oxide bonding: the MIT Lincoln Laboratory's 'face down' stacking technique12.6 3D integration using oxide bonding: IBM's 'face up' stacking technique12.7 3D integration using oxide bonding: the sequential 3D process12.8 Advanced bonding technology: Cu-Cu bonding12.9 Advanced bonding technology: dielectric bonding12.10 Summary12.11 Acknowledgements12.12 References13. Silicon-on-insulator (SOI) technology for photonic integrated circuits (PICs) Abstract:13.1 Introduction13.2 Silicon (on insulator) photonics13.3 Photonic building blocks in SOI13.4 Device tolerances and compensation techniques13.5 Advanced stacks for silicon photonics13.6 Applications of silicon photonics13.7 Conclusion13.8 References14. Silicon-on-insulator (SOI) technology for micro-electromechanical systems (MEMS) and nano-electromechanical systems (NEMS) sensors Abstract:14.1 Introduction14.2 SOI MEMS/NEMS device structures and principles of operation14.3 SOI MEMS/NEMS design14.4 SOI MEMS/NEMS processing technologies14.5 SOI MEMS/NEMS fabrication14.6 Conclusion14.7 References Index

• ISBN: 978-0-08-101526-1
• Editorial: Woodhead Publishing
• Encuadernacion: Rústica
• Páginas: 390
• Fecha Publicación: 30/06/2016
• Nº Volúmenes: 1
• Idioma: Inglés