Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization as well as functional and timing verification. Recent, innovative technologies such as retargetable simulator generation, dynamic binary translation, or sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. Simultaneously, processor and SoC simulation is still a very active research area, e.g. what amounts to higher simulation speed, flexibility, and accuracy/speed trade-offs. This book presents and discusses the principle technologies and state-of-the-art in high-level hardware architecture simulation, both at the processor and the system-on-chip level. "Presents state-of-the-art and future trends in processor and SoC simulation; Demonstrates how simulation helps to boost hardware and software design productivity; Addresses simulation requirements and technologies in the multicore context; Covers system aspects, such as virtual platforms, bus simulation, caches, power, design space exploration and a wide range of electronics industry segments." INDICE: Introduction.- Fast instruction-accurate and cycle-accurate processor simulation.- MPSoC exploration and early SW performance estimation.- Hybrid simulation.- Sampling/statistical simulation.- Simulator parallelization.- Automatic simulator generation from architecture models.- High-level simulation/modeling languages.- Bus/Network-on-chip (NoC) simulation.- Power simulation.- Cache simulation.- MPSoC platform architecture verification.- Full system simulators.- Simulation of parallel architectures.- Simulation of data centers- Virtual platform technology.- Virtual platform use cases.- Automatic design-space exploration.
- ISBN: 978-1-4419-6174-7
- Editorial: Springer
- Encuadernacion: Cartoné
- Páginas: 240
- Fecha Publicación: 29/08/2010
- Nº Volúmenes: 1
- Idioma: Inglés