Application-specific mesh-based heterogeneous FPGA architectures

This book presents a new exploration environment for mesh-based, heterogeneous FPGA architectures. It describes state-of-the-art techniques for reducing area requirements in FPGA architectures, which also increase performance and enable reduction in power required. Coverage focuses on reduction of FPGA area byintroducing heterogeneous hard-blocks (such as multipliers, adders etc) in FPGAs, and by designing application specific FPGAs. Automatic FPGA layout generation techniques are employed to decrease non-recurring engineering (NRE) costsand time-to-market of application-specific, heterogeneous FPGA architectures.Presents a new exploration environment for mesh-based, heterogeneous FPGA architectures Describes state-of-the-art techniques for reducing area requirements in FPGA architectures Enables reduction in power required and increase in performance INDICE: Introduction.- State of the Art.- FPGA Layout Generation.- ASIF: Application Specific Inflexible FPGA.- ASIF using Heterogeneous Logic Blocks.- ASIF Hardware Generation.- Conclusion and Future Lines of Research.

• ISBN: 978-1-4419-7927-8
• Editorial: Springer
• Encuadernacion: Cartoné
• Páginas: 150
• Fecha Publicación: 29/11/2010
• Nº Volúmenes: 1
• Idioma: Inglés