Retargetable processor system integration into multi-processor system-on-chip platforms

The ever increasing complexity of modern electronic devices together with thecontinually shrinking time-to-market and product lifetimes pose enormous chipdesign challenges to meet flexibility, performance and energy efficiency constraints. As a consequence, the current trend is towards programmable platforms(Multi-Processor System-on-Chip Platforms, MP-SoC), which are tailored to therespective target application. In the usual case, a new platform is designed by selecting and assembling standard platform elements. However, best results can only be achieved if the processor cores and the communication modules themselves are also optimized for the target application. Effective exploration isonly possible if accurate module simulators are generated automatically basedon abstract specifications. As a matter of fact, CoWare’s BusCompiler allows generating accurate simulators for communication modules, and modeling languages such as LISA enable the same for processor cores. New methodology with potential for obtaining best results in MP-SoC design Most detailed book about retargetable processor system integration Separate, elaborated introduction into state of the art for all 3 involved fields INDICE: Dedication. Foreword. Preface. 1. Introduction. 2. SOC Design Methodologies. 3. Communication Modeling. 4. Processor Modeling. 5. Processor System Integration. 6. Successive Top-Down Refinement Flow. 7. Automatic Retargetability. 8. Debugging And Profiling. 9. Case Study. 10. Summary. Appendices. A.Businterface Definition Files. B. Extended CoWare Tool Flow. List of Figures.References.

• ISBN: 978-1-4020-8574-1
• Editorial: Springer
• Encuadernacion: Cartoné
• Páginas: 180
• Fecha Publicación: 01/07/2008
• Nº Volúmenes: 1
• Idioma: Inglés